Strategic focus

Our focus at CCER is to respond critically to various new applications and develop leading edge technologies on communication systems and networks to facilitate these applications.

Objectives

Our objectives at CCER are:

• to develop an environment for the pursuit of research in the fields of communication systems and networks;
• to conduct collaborative research projects with the industry and interdisciplinary partners;
• to become a recognised research centre that will attract scholars, experts and students from interstate and abroad; and
• to disseminate research outcomes through international journal and conference publications, workshops, community focused seminars and the University's teaching programs.

Postgraduate research

The Centre for Communications and Electronics Research provides an excellent opportunity for new postgraduate students, both the PhD and Masters in Engineering, to do high quality research in the field of communication systems and networks. Academic and research staff at our Centre are recognised nationally and internationally for their research contributions in communication systems and networks. Our researchers work closely with industry, so students get the opportunity to interact closely with industry partners and promote their research works, assisting students with their career development within the industry. Students are equipped with dedicated office space and excellent computing resources at the centre. A range of scholarship opportunities are available to meet the tuition costs and living expenses of potential research students.

RESEARCH THEMES

The centre performs research on various leading edge technologies of communication systems and networks. The key areas of interest are high speed networking, wireless sensor networks, wireless, optical and multimedia communication, and digital image processing.

HARDWARE/SOFTWARE PARTITIONING FOR CODESIGN OF EMBEDDED SYSTEMS

Hardware-Software Partitioning is the key issue in the Codesign of embedded systems. Software- Oriented partitioning at the binary level makes the method suitable for partitioning of software binaries onto hardware. The partitioned software binary to be transformed into hardware is identified using instruction level profiling.

• Partitioning Algorithm and Decompiler are designed for binary level partitioning.
• Scheduling and Allocation Algorithm is proposed for Hardware oriented approach.
• System delay and buffer size is estimated for Software oriented approach
• Hardware/Software Co design for flexible granularity is attempted using cut points
• An estimator is designed to calculate hardware logic for the control construct in source level and binary level partitioning.
• For more information about this research area, please contact Professor Sangeetha.

EFFICIENT SPECTRUM SENSING FOR COGNITIVE NETWORKS

The spectrum is one of the major critical radio reserves, whose organization in imminent wireless communication networks will be a difficult mission. The static allocation of frequencies to different systems and operators causes inefficiency. So, dynamic spectrum access is proposed to efficiently utilize the available spectrum. Cognitive radio is the facilitating expertise for the dynamic spectrum access. Cognitive radio is being flaunted as the huge bang in wireless communication. A huge division of the usability of cognitive radio rests upon its capability to notice white spaces in the spectrum, i.e. to perceive the occurrence of the licensed or PU. But the sensing system has the following issues to make it to practically usable.

1. The accuracy /reliability of detection
2. Security for physical layer attacks
3. Computation complexity of sensing algorithm. For more information about this research area, please contact Professor Arulselvi.

MODELING AND CHARACTERIZATION OF DCO USING PASS TRANSISTOR

In the field of simulation work, it could proceed to an extent that, simulate with arbitrary values of the passive component and the voltage sources. The simulation results recorded various strategic points in the circuit indicate and validate the fact that the circuit is working in the expected lines with regard to the energy transfer in the expected lines with regard to the energy transfer in the tank circuit and sustenance in DC transient Analysis. Also in this proposed experimental work, it is observed that for an arbitrary load, the voltage obtained is agreeing with the theoretically computed DC-Voltage levels. The scope of the work can be extended to the actual calculation of the passives, the initial voltages across the capacitors and inductors. In addition to the exciting DC levels of the sources employed. The small signal analysis can also be done with due regard to the desired behavioural properties of switching devices used.

For more information about this research area, please contact Professor Kanniga.

CORRELATIVE ANALYSIS OF HUMAN CARDIO-RESPIRATORY SIGNALS WITH PPG SIGNAL USING SPECTRAL ANALYSIS TECHNIQUES

Optical sensors that use photons as sensing elements are increasingly becoming important and relevant in the field of non-invasive diagnostics. The reason is that they have a simple construction, easy to use and relatively inexpensive in comparison with tools such as EEG, MRI and FMRI that can be use for research purposes without much investment. Among the various optical sensors available, the Photoplethysmography (PPG) sensors that are capable of measuring the blood volumetric changes in the subcutaneous vessels in conjunction with sensitive temperature sensors that enables the monitoring of breathing activity are used in the present study. Detailed analysis of the frequency spectrum of the PPG signal shows a peak around 0.12 Hz other than the two principle frequency components namely the cardiac peak appearing at around 1 Hz corresponding to 60 pulsations a minute (fh) and the respiratory appearing at around 0.25 Hz corresponding to 15 inspiration/expiration cycles per minute (fb). The amplification/prominence of the low frequency rhythms also called the relaxation rhythm that appears around 0.12Hz (fl) in conjunction the respiratory peak during deep breathing is reported in the present work. Next step in evaluating the raw signal is the application of Fast Fourier Transform (FFT). For filtration of the raw data, application of Fast Fourier Transform (FFT) / Power Spectral Density (PSD) and plotting graphs, the Diadem 7.0 program is used. FFT gives a graph that clearly portrays the power distribution of the signal over the entire frequency spectrum. As the FFT of the PPG signal contains numerous peaks, Power spectral density which nothing but the square of FFT has been used to evade confusion. Usually the cardiac peak is the most dominant peak in the power i spectrum of any normal PPG recording. A relatively weaker peak will be detectable at the breathing frequency.

For more information about this research area, please contact Professor Sundararajan.

REMOVAL OF HIGH DENSITY SALT AND PEPPER NOISE THROUGH MODIFIED CASCADED FILTER

A modified cascaded filter for the restoration of gray scale color images and video that are highly corrupted by salt and pepper noise is proposed in this paper. The proposed algorithm replaces the noisy pixel by trimmed median value when other pixel values, 0's and 255's are present in the selected window and when the entire pixel values are 0's and 255's then the noise pixel is replaced by mean value of all the elements present in the selected window. This modified cascaded filter proves better results than the SMF-Standard Median Filter, DMF, and ATMF-Alpha Trimmed Median Filter, UTMF- Unsymmetrical Trimmed Mean Filtering. The modified cascaded filter is tested against different gray scale color images and video and it gives better Peak Signal-to-Noise Ratio (PSNR) and Image Enhancement Factor (IEF).

For more information about this research area, please contact Professor Karthik.

MAXIMUM DEMAND CONTROL USING AD-HOC NETWORK TO AVOID GRID FAILURE

Controlling and monitoring the electrical grids from theft of power and high usage of power than the allotted is difficult and hard. Considering the above problem, a real time system using wireless sensor network is designed that detects when a user crosses the load limit or a theft occurs in the power line. Power can be distributed more efficiently to industries without crossing the load demand. The maximum load usage is specified by the Electricity board - EB according to which this system is designed. Each current transformers and potential transformers are incorporated with the developed system and if in any line, more than the specified power is drawn then a buzzer is set and will turn off till the user reduce the power consumption. The same will be alerted to the electricity board about the power violation. If the load usage is not reduced by the user after the buzzer is set, then the particular line that overdraws power will be shut down and an alert will be sent to the EB office about the same preventing the shutdown of the whole system. For more information about this research area, please contact Associate Professor Philomina.

ENERGY - EFFICIENT METHODOLOGIES AND ARCHITECTURES OF NETWORK-ON-CHIP

The emerging technology requires a large number of core to be integrated into a single chip. This had led to the development of System on Chip. SoC' shave paved way for large scale integration of electronics mounted on a single chip. SoC's are nowadays highly preferred for designing portable and compact devices with low power. The complex and complete integration of SoC has paved way for the concept of Network on Chip (NoC). NoC is a key challenge for power optimization as they are battery operated. In this paper survey provides a design of energy aware NoC with reduced power consumption and enhanced performance. A broad view of power optimization using voltage/frequency Island is provided. The paper also provides a detailed survey of the different data encoding techniques and their efficiency. The objective of this survey is to provide information regarding improved design for reducing power in NoCs. The survey also helps to arrive at a conclusion of the various power optimization techniques.

For more information about this research area, please contact Associate Professor Beulah Hemalatha.

DESIGN OF POWER AWARE ON CHIP EMBEDDED MEMORY BASED FSM ENCODING IN FPGA

A new design methodology to reduce power consumption and minimization of area in FSM based system is fore fronted into FPGA using Finite State Machines (FSMs) mapping in this proposed work. This FSM is mapped into the On Chip Embedded Memory (OCEM) through clock gating technique. FSM encoding is stored using OCEM as it reduces the Flip-Flop (FF) and combinational function usage. Clock gating technique will reduce the power consumption additionally through blocking the clock while OCEMP is in idle state. The proposed design is tested and analyzed using ALTERA cyclone II FPGA for Arithmetic Logic Units (ALU), Advanced Encryption Standard core (AES), SRAM controller and Synchronous FIFO. OCEM based implementation of One- Hot encoding is performed and compared with conventional Flip-Flop based One-hot encoding and analyzed. The FSM implemented using proposed method consumes less power and fewer areas when compared with FF based FSM implementation or using binary encoding technique. The OCEM based implementation can be clocked to maximum clock frequency. Experimental results and analyses shows that OCEM based FSM consumes 4 to 26 % less power than FF based techniques. For more information about this research area, please contact Associate Professor Jasmin.

On-going Research Projects

• FPGA implementation of low power testing using razor based processor
• Analysis of physiological signal with embedded system and its application on monitoring cognitive level
• Power reduction using multiple voltage technique
• Effective Leakage Power Minimization in Active and Standby Mode of CMOS Circuits using Multipurpose Techniques
• A Dynamic application placement workflow management in wireless technology using embedded Linux
• Power efficient 3VL memory cell design using CNTFETs
• Hybrid Energy Efficient Receiver Initiated MAC Scheduling Protocol for Ad-hoc Wireless Sensor Network
• FPGA based Image Water marking
• Meta heuristic algorithm for VLSI floor planning problem
• A modified approach for content based image retrieval using local tetra pattern
• A novel approach on content based image retrieval by considering various image features
• Multi resolution Analysis for Graphical Colour Image and Compression using Wavelet Transform
• Improvement of QOS in Wireless Networks using MIMO-OFDM Technique
• Secure data transmission using latest image processing techniques
• Performance improvement in cognitive network
• Machine learning based automatic bank cheque image processing
• Comparison of NAM and acoustic speech processing using wavelet transform and stellaris processor
• Design of adaptive reconfigure architecture suitable for heterogeneous wireless sensor networks
• Collective network channel fountain design for safe communication in wireless network
• Performance evaluation of various embedding techniques for all types of data
• Design, analysis and implementation of microwave power amplifier
• Design and analysis of energy harvesting photodiodes.
• Next generation wireless communication devices
• Design analysis and implementation of tuneable microwave band pass filer
• Localization of UWB based wireless sensor network
• Performance Analysis of Energy Efficient Routing Algorithms in Wireless sensor network
• Haralick theory based on digital image processing
• Network on chip
• High Performance Implementation of RSSI based WIFI Locater Tracker for Android Applications
• Implementation of active filter for power-factor correction of nonlinear loads
• Comparative study of nano-materials based dipole antennas for terahertz communications
• An improved carry select adder using common boolean logic towards low power applications
• Early wildfire detection system using wireless sensor network
• Analog and mixed signal circuit design using different methodologies
• Design MIMO-OFDM Based Cognitive Radio Networks by using Hybrid access optimization algorithm in dynamic spectrum sensing over fading channels
• Speech Controlled by Embedded system
• Mapping DSP benchmarks on reconfigurable hardware architecture
• Design an Adaptive FIR Filter using APC-OMS Algorithm
• VLSI design of an enhanced crypto system by combining AES,DES and blowfish algorithms on FPGA
• Minimization power utilization for environment based WSN
• Development of ontology based knowledge system for health issues using electronic media database
• Design and development of an embedded system for data acquisition for the networked monitoring system
• Piezo-resistive accelerometer with various quad beam structure
• Text Analytics for business intelligence dashboard
• Improving cellular capacity and service by service provider in ROF
• Face tracking system using field feature, space and bi-cubic interpolation
• Efficient method of melanoma detection using artificial neural networks
• Custom Thresholding EM Algorithm for wavelet based image de-speckling

Publication Statistics (Since 2012)

• International Journals :150
• International Conferences : 10
• National Conferences : 10
• National Journals : 75

Sponsered Projects

• Control construct estimation is done using behavioral network graph
• Enhanced Multi-Parameter Cognitive Architecture For Future Wireless Communication
• Chair with Brain Interface
• Building a six feet humanoid robot (BIOMAN)

Awards

• Dr.M.Sundararajan, Jewel of India Award-2010 conferred by Indian Solidarity Council, NewDelhi for outstanding service in the promotion of Educational Excellence.
• Dr.M.Sundararajan, Rashtriya Vidya Gavrav Gold Medal Award-2010, Certificate of Excellence conferred by International Institute of Education; Management, New Delhi for outstanding achievements and remarkable role in the field of Education.
• Dr.M.Sundararajan, “Service Sans-pareil” award conferred by Lions Club of Gandhi Avenue, Chennai for outstanding service in the promotion of Educational Excellence.
• Dr.M.Sundararajan, “Best Teacher Award – 2002” conferred by Bharath institute of Science & Technology, Chennai, Tamilnadu, India.
• Dr.M.Sundararajan, Sri Lakshmi Ammaal Engineering College secured NAAC Accreditation with “A” Grade under my supervision on Jun 2013.
• Mr.B.Karthik, Elsevier Reviewer Recognition -Certificate of Reviewing by Journal of Information Security and Applications, Elsevier, Amsterdam, Netherlands, Awarded April 2016.
• Ms.S.Arulselvi, “Best Teacher Award – 2014 & 2015” conferred by Bharath institute of Science & Technology, Chennai, Tamilnadu, India.